This invention relates to transceiver circuitry for use in a Gigabit Interface Converter (GBIC) module.
Fibre Channel and Gigabit Ethernet are high speed data transfer interfaces that can be used to interconnect workstations, mainframes, supercomputers and storage devices. Supporting numerous channel and network Upper Level Protocols (ULPs), Fibre Channel allows faster data transfer over longer distances between a larger number of devices or communication points. The standard combines attributes of a channel with attributes of a network, thus providing a general transport vehicle for ULPs such as the Small Computer System Interface (SCSI), the Intelligent Peripheral Interface (IPI), the High Performance Parallel Interface (HIPPI), the Internet Protocol (IP), Ethernet (IEEE 802.3) and the Asynchronous Transfer Mode (ATM). Accommodating the pattern of ever increasing data rates, Fibre Channel is a scalable interconnect standard that considers all aspects of speed, length and media (copper and fiber). Fibre Channel development is focused on data transfer at 1.0625 Gbits/sec with provisions for 2.125 Gbits/sec and 4 Gbits/sec.
AMP Incorporated of Harrisburg, Pa., Compaq Computer Corporation of Houston, Tex., Vixel Corporation of Bothell, Wash. and Sun Microsystems Computer Company of Mountain View, Cali. have together agreed on and written a standard for a serial transceiver module, which is called the Gigabit Interface Converter (GBIC) module. The module provides a single small form factor for a wide variety of standard Fibre Channel connectors and transmission media. The module can be inserted in or removed from a host or switch chassis without first removing power from the receiving socket. Any copper and optical transmission technologies consistent with the form factor can be used.
The GBIC module has a plug in a first insulative housing and a receptacle in a second insulative housing at respective opposite ends of the module. A printed circuit board containing transceiver circuitry is secured to, and connects, the plug and the receptacle. The module is insertable into a guide structure mounted to a host board and having a receiving end and a terminating end. The terminating end of the guide structure has a receptacle for mating engagement with the module plug when the module is fully inserted in the guide structure. The guide structure houses and aligns the module and provides polarized guide rails to prevent incorrect installation of the module and is designed to accept the side retention latches specified in the GBIC module standard.
The standard for the GBIC module sets signal specifications for all positions of the module plug and receptacle. In particular, the GBIC is driven from the host board with serial differential positive emitter coupled logic (PECL) signals applied to a pair of transmission data leads. When the transmission medium is wire, rather than fiber, the transmission data signals drive a transmission conversion circuit providing a standard serial output. The transmission conversion circuit should be designed to drive up to thirty (30) meters of copper wire. The serial receiver on the GBIC module board detects incoming signals and amplifies and converts them to provide to the host board serial differential PECL data signals on a pair of receive data leads. Various control and status signals are also specified in the GBIC module standard. For example, a receive loss of signal (RX_LOS) indication is generated when the incoming data signal amplitude is not sufficient to achieve the specified bit error rate or to indicate loss of power at the receiver circuit. A transmission fault signal is generated to indicate a failure has been detected in the transmission conversion circuit or to indicate loss of power at the transmit circuit. The output from the transmission conversion circuit is also disabled in response to a transmit disable signal generated by the host.
Transceiver circuitry according to the present invention is adapted for use in a gigabit interface converter module to process receive and transmit signals in a differential format. The circuitry is installed between, and coupled to,.a plug connected to a host and a receptacle connected to a transmission medium. The host provides to the circuitry power and differential signals for transmission and the circuitry provides to the transmission medium amplified differential transmission signals. The transmission medium provides to the circuitry received differential signals and the circuitry provides to the host a signal detect indication when the differential of the received differential signals falls below a predetermined differential threshold and when the received differential signals switch at greater than a predetermined rate. The circuitry further provides to the host amplified differential signals corresponding to the differential signals provided to the circuitry by the transmission medium. The inventive circuitry comprises a current supply and an operational amplifier having an inverting input, a non-inverting input and an output. A first controllable switching element is coupled to the current supply and to the non-inverting input of the operational amplifier. A second controllable switching element is coupled to the current supply and to the inverting input of the operational amplifier. A third controllable switching element is coupled to the current supply and to the inverting input of the operational amplifier. The second controllable switching element has a control terminal coupled to receive a first of the differential signals provided by the transmission medium and the third controllable switching element has a control terminal coupled to receive a second of the differential signals provided by the transmission medium. The control terminals of the second and third controllable switching elements are further coupled to a fixed bias voltage and the control terminal of the first controllable switching element is coupled to a bias voltage equal to the fixed bias voltage plus one half the predetermined differential threshold. Accordingly, the output of the operational amplifier is at a first level when the differential of the received differential signals exceeds the predetermined differential threshold and is at a second level when the differential of the received differential signals is less than the predetermined differential threshold.